This invention relates to a protection system for immunizing an adjustable d-c bus voltage, produced for an inverter by rectifying a-c power line voltage in a phase-controlled SCR rectifier bridge, against the effects of undesired line voltage disturbances resulting from momentary power outages or major power reductions.
A well-known arrangement for developing, for an inverter, an adjustable amplitude d-c bus voltage from a-c power line voltage (either single-phase or three-phase) comprises a phase-controlled SCR rectifier bridge having a plurality of SCR's (silicon controlled rectifiers) whose conduction angles are controlled in order to establish a desired d-c magnitude and to control the power supplied over the d-c bus and through the inverter to the inverter's load circuit, often times an a-c motor. The power flow is controlled by regulating the conduction angles of the SCR's during each half cycle of the applied a-c line voltage. Each SCR can conduct, during each positive polarity half cycle of the voltage applied thereto from the a-c power system, when the SCR's anode is positive relative to its cathode. However, conduction will not occur during a positive half cycle until gate current is supplied to the SCR's gate. At that instant, the SCR fires into conduction, or turns on, and permits load current to flow therethrough until the end of the positive half cycle. The greater the phase angle or time delay between the start of a positive half cycle and the firing of the SCR into conduction, the less the conduction angle and the less alternating current that will be rectified and supplied through the inverter to the load circuit, thereby providing less d-c voltage across the output of the phase-controlled SCR rectifier bridge. Preferably, the rectifier bridge is followed by a low-pass filter (usually a series-connected choke and a shunt-connected capacitor) to minimize the ripple component and smooth out the d-c voltage before it is applied over the d-c bus to the inverter where it is effectively converted to an alternating voltage for application to the inverter's load circuit.
The gating signal must be generated by circuitry which operates in precise synchronism with respect to the instants at which the a-c line voltage crosses its a-c axis and thus has a zero instantaneous amplitude. Unless the operation of the gating signal generator is exactly synchronized to those zero crossings of the line voltage, the timing of the gating pulses will be incorrect and the SCR's will be fired into conduction at the wrong times, resulting in an erroneous d-c bus voltage. High frequency noise superimposed on the a-c line voltage would ordinarily adversely affect the operation of the gating signal developing circuitry and cause misfiring of the SCR's, but such noise can be filtered out and rendered ineffectual. On the other hand, line voltage disturbances or fluctuations, resulting from momentary power outages or major power reductions, present a problem. Such power outages or reductions usually last for less than a full cycle of the a-c line voltage and may be caused, for example, by extremely large loads suddenly placed on the power line, by the power utility company switching power generators, or by lightning which strikes the power line and actuates a lightning arrester. The line voltage disturbances cause filter level shifts which disrupt the required synchronized relationship between the gating pulses and the zero crossings of the line voltage. The SCR's are therefore improperly gated and when the disturbance disappears the SCR's may have a much greater conduction angle than desired, as a consequence of which the d-c bus voltage may overshoot and increase to such an extent that not only would the operation of the inverter's load circuit be significantly altered but, of more importance, circuit components, such as the switching devices (which may be, for example, transistors) in the inverter could be damaged or destroyed.
This problem has been overcome by the present invention. The disclosed protection system ensures that line voltage disturbances will have a negligible effect on the operation of the inverter system, while at the same time preventing circuit component failure or destruction. The present invention thus provides a highly efficient and reliable inverter system which is immune to power line voltage disturbances caused by momentary power outages or major power reductions.